The first meetups of the Portable SystemVerilog Examples group at Hacker Dojo in Mountain View, California were a kind of brainstorming sessions. We discussed the electronic industry, the essence of modern chip design, and the challenges of educating new design engineers. Then we moved to a new mode of action. We started weekly meetings of the core R&D team with the goal to prepare educational materials for the events for a larger audience. The meetings are generally held on Sundays from 11 pm to 2 pm. If you cannot come to Mountain View, you can join online.

We are focusing on interview-level microarchitectural and CPU design examples, providing FPGA vendor-neutral infrastructure and compatibility with open-source ASIC design tools.

Написал лонгрид на английском о текущем состоянии открытых средств проектирования ASIC-ов. Заодно познакомил англоязычных читателей с практиками шаманов Сибири и фигурой Ивана Сусанина. Упомянул планируемые семинары в Мексике и Армении.

A text on the current state of Open-source ASIC design tools. Includes side discussions of the upcoming hackathons in Mexico and Armenia, Docker and Python, Static Timing Analysis and RISC-V, Siberian shamans and treacherous swamps in Belarus.

Since the New Year we had 7 Verilog meetups at HackerDojo. We discussed the modern way of designing digital circuits using hardware description languages, the exercises on FPGA boards and the topic of microarchitecture. For the last two sessions we went over the most basic CPU core that can be used as a baseline for further exercises.

Now, in order to make progress toward the goal of creating new educational materials, it is essential for the regular participants to solve all the homework exercises (see the details in the post below) in parallel with studying the recommended materials.

The next steps are:

1) We are going to do weekly Zoom calls on Sundays, starting March 24, 2024 at 11 am California time (summer time). The link. During this call we are going to discuss the SystemVerilog Homework and the individual projects.

2) Once we develop more materials, we are going to organize a Show-and-Tell session in Hacker Dojo, for a wider audience. During the session several participants from the core team will present demos on various FPGA boards and explain to the curious how FPGA and ASIC work.

Armenia is a lucky country. Back in the 1990s somebody lobbied Synopsys, the #1 leader in the Electronic Design Automation market, to create a division there. It was joined by Mentor Graphics / Siemens EDA, another EDA leader, then NVidia. Synopsys Armenia became the largest Synopsys division outside the US Silicon Valley and Boston, although the Taiwanese may tell you otherwise. Since Synopsys and Mentor make software used by chip designers in Apple, Samsung, AMD and all other electronic companies, Armenia has an unfair advantage over all their neighbors in Caucasus and Central Asia.

In addition, Armenia has friendly relations with Russia, and most Armenians speak Russian as well. This has facilitated the move of many Russian companies to Armenia, for example, a RISC-V semiconductor IP provider Syntacore. Finally, as we can see from the recent conference EDA Connect, Armenia is attracting the attention of electronic and EDA companies from China.

EDA Connect featured not only academic and industrial papers but also a hackathon on FPGA design, attended by local students from Yerevan State University, the American University of Armenia, the Russian-Armenian University, the French University in Armenia and others.

Многоэтапный процесс интервью в IT иногда занимает до 40 дней, но как правило большинство кандидатов отваливаются именно после одного из первых этапов отбора - behavioral interview.

Обычно behavioral questions включают в себя вопросы на следующие темы...