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FPGA *

Programmable logic integrated circuits

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System-on-Chip bus: AXI4 simplified and explained

Reading time20 min
Views27K

Protocol AXI4 was developed for High-bandwidth and low latency applications. It is designed to allow communication between master and slave devices. Master is typically a DMA or CPU and slaves are DRAM controllers, or other specific protocol controllers: UART, SPI, and others. Sometimes one component can implement multiple instances of this protocol. Usually, a prefix is used to differentiate between multiple AXI4 interfaces.

For example, Ethernet MAC can integrate DMA and slave interface used to command MAC. MAC can accept commands on the slave interface that contain data about the location of the next ethernet packet and MAC can start fetching this packet using the separate master interface instance.

This article was motivated by common design mistakes AXI4 designers make when they are designing their Digital IP. (Looking at you Xilinx)

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Total votes 10: ↑10 and ↓0+10
Comments1

Physical unclonable functions: protection for electronics against illegal copying

Reading time7 min
Views5K

Source: The online counterfeit economy: consumer electronics, a report made by CSC in 2017

Over the past 10 years, the number of fake goods in the world has doubled. This data has been published in the latest Year-End Intellectual Property Rights Review by the US Department of Homeland Security in 2016 (the most current year tracked). A lot of the counterfeiting comes from China (56%), Hong Kong (36%) and Singapore (2%). The manufacturers of original goods suffer serious losses, some of which occur on the electronics market.

Many modern products contain electronic components: clothes, shoes, watches, jewellery, cars.
Last year, direct losses from the illegal copying of consumer electronics and electronic components in the composition of other goods were about $0.5 trillion.

How to solve this problem?
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Total votes 14: ↑14 and ↓0+14
Comments0

System in Package, or What's Under Chip Package Cover?

Reading time7 min
Views5.1K
Transistor feature size is decreasing despite constant rumors about the death of Moore’s law and the fact that industry is really close to physical limits of miniaturisation (or even went through them with some clever technology tricks). Moore’s law, however, created user’s appetite for innovation, which is hard to handle for the industry. That’s why modern microelectronic products aren’t just feature size scaled, but also employ a number of other features, often even more complicated than chip scaling.


Disclaimer: This article is a slightly updated translation of my own piece published on this very site here. If you're Russian-speaking, you may want to check the original. If you're English-speaking, it's worth noting that English is not my native language, so I'll be very grateful for the feedback if you find something weird in the text.
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Total votes 38: ↑38 and ↓0+38
Comments0

Real-time edge detection using FPGA

Reading time8 min
Views15K

Introduction


Our project implements a real-time edge detection system based on capturing image frames from an OV7670 camera and streaming them to a VGA monitor after applying a grayscale filter and Sobel operator. Our design is built on a Cyclone IV FPGA board which enables us to optimize the performance using the powerful features of the low-level hardware and parallel computations which is important to meet the requirements of the real-time system.


We used ZEOWAA FPGA development board which is based on Cyclone IV (EP4CE6E22C8N). Also, we used Quartus Prime Lite Edition as a development environment and Verilog HDL as a programming language. In addition, we used the built-in VGA interface to drive the VGA monitor, and GPIO (General Pins for Input and Output) to connect the external hardware with our board.


ZEOWAA FPGA development board

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Total votes 55: ↑41 and ↓14+27
Comments46

Stack-based calculator on the Cyclone IV FPGA board

Reading time12 min
Views9.7K

Introduction


As first-year students of Innopolis University, we had an opportunity to make our own project in computer architecture. University suggested us several projects and we have chosen to make a stack-based calculator with reverse polish notation. One of the requirements for the project is to use FPGA board provided by the university.



As our board, we have chosen Cyclon IV. Therefore, we had to write code on hardware description language. In the course we have studied Verilog, so we have chosen it. Also, the university has additional modules for FPGA, such as numpad, thus we decided to use it in our project.

In this article, we want to share our knowledge about FPGA and Verilog, also provide you with a tutorial to repeat our project.
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Total votes 75: ↑58 and ↓17+41
Comments27

Authors' contribution